On Sat, 12 Nov 2022 at 22:47, Andrew Pinski wrote:
>
> On Sat, Nov 12, 2022 at 1:34 PM Philipp Tomsich
> wrote:
> >
> > Some architectures, as it the case on RISC-V with the proposed
> > ZiCondOps and the vendor-defined XVentanaCondOps, define a
> > conditional-zero instruction that is equivalent
On Sat, Nov 12, 2022 at 1:34 PM Philipp Tomsich
wrote:
>
> Some architectures, as it the case on RISC-V with the proposed
> ZiCondOps and the vendor-defined XVentanaCondOps, define a
> conditional-zero instruction that is equivalent to:
> - the positive form: rd = (rc != 0) ? rs : 0
> - the neg
Some architectures, as it the case on RISC-V with the proposed
ZiCondOps and the vendor-defined XVentanaCondOps, define a
conditional-zero instruction that is equivalent to:
- the positive form: rd = (rc != 0) ? rs : 0
- the negated form: rd = (rc == 0) ? rs : 0
While noce_try_store_flag_mask
