Re: [PATCH 6/7] RISC-V: Make vectorized memset handle more cases

2024-10-30 Thread Jeff Law
On 10/30/24 11:21 AM, Craig Blackmore wrote: Consider that a short term problem, at least for glibc.  I've got the magic ifunc bits which introduce vector versions and also check for fast unaligned support.    Does that change the calculus in your mind? Yes, with those bits in place it wo

Re: [PATCH 6/7] RISC-V: Make vectorized memset handle more cases

2024-10-30 Thread Craig Blackmore
On 29/10/2024 15:09, Jeff Law wrote: On 10/29/24 7:59 AM, Craig Blackmore wrote: On 19/10/2024 14:05, Jeff Law wrote: On 10/18/24 7:12 AM, Craig Blackmore wrote: `expand_vec_setmem` only generated vectorized memset if it fitted into a single vector store.  Extend it to generate a loop

Re: [PATCH 6/7] RISC-V: Make vectorized memset handle more cases

2024-10-29 Thread Jeff Law
On 10/29/24 7:59 AM, Craig Blackmore wrote: On 19/10/2024 14:05, Jeff Law wrote: On 10/18/24 7:12 AM, Craig Blackmore wrote: `expand_vec_setmem` only generated vectorized memset if it fitted into a single vector store.  Extend it to generate a loop for longer and unknown lengths. The tes

Re: [PATCH 6/7] RISC-V: Make vectorized memset handle more cases

2024-10-29 Thread Craig Blackmore
On 19/10/2024 14:05, Jeff Law wrote: On 10/18/24 7:12 AM, Craig Blackmore wrote: `expand_vec_setmem` only generated vectorized memset if it fitted into a single vector store.  Extend it to generate a loop for longer and unknown lengths. The test cases now use -O1 so that they are not sensit

Re: [PATCH 6/7] RISC-V: Make vectorized memset handle more cases

2024-10-19 Thread Jeff Law
On 10/18/24 7:12 AM, Craig Blackmore wrote: `expand_vec_setmem` only generated vectorized memset if it fitted into a single vector store. Extend it to generate a loop for longer and unknown lengths. The test cases now use -O1 so that they are not sensitive to scheduling. gcc/ChangeLog:

[PATCH 6/7] RISC-V: Make vectorized memset handle more cases

2024-10-18 Thread Craig Blackmore
`expand_vec_setmem` only generated vectorized memset if it fitted into a single vector store. Extend it to generate a loop for longer and unknown lengths. The test cases now use -O1 so that they are not sensitive to scheduling. gcc/ChangeLog: * config/riscv/riscv-string.cc (use_