Re: [PATCH 5/7] riscv: thead: Add support for XTheadBb ISA extension

2022-11-17 Thread cooper.qu--- via Gcc-patches
On Sun, Nov 13, 2022 at 10:46:34PM +0100, Christoph Muellner wrote: > +(define_expand "extv" > + [(set (match_operand:GPR 0 "register_operand" "=r") > + (sign_extract:GPR (match_operand:GPR 1 "register_operand" "r") > + (match_operand 2 "const_int_operand") > +

[PATCH 5/7] riscv: thead: Add support for XTheadBb ISA extension

2022-11-13 Thread Christoph Muellner
From: Christoph Müllner The XTheadBb ISA extension provides instructions similar to Zbb: * th.srri/th.srriw * th.ext/th.extu * th.ff1 (count-leading-zeros) * th.rev/th.revw Instructions that are not covered, because they don't fit into a pattern: * th.ff0 (count-leading-ones) * th.tstnbz For th