Re: [PATCH 4/4] RISC-V: Improve slide1up pattern.

2024-11-18 Thread 钟居哲
CC: palmer; kito.cheng; juzhe.zhong; jeffreyalaw; pan2.li; rdapp.gcc Subject: [PATCH 4/4] RISC-V: Improve slide1up pattern. From: Robin Dapp This patch adds a second variant to implement the extract/slide1up pattern. In order to do a permutation like <3, 4, 5, 6> from vectors <0, 1, 2,

[PATCH 4/4] RISC-V: Improve slide1up pattern.

2024-11-17 Thread Robin Dapp
From: Robin Dapp This patch adds a second variant to implement the extract/slide1up pattern. In order to do a permutation like <3, 4, 5, 6> from vectors <0, 1, 2, 3> and <4, 5, 6, 7> we currently extract <3> from the first vector and re-insert it into the second vector. Unless register-file cro