On 8/6/25 00:52, Karl Meakin wrote:
;; Emit a `CBB (register)` or `CBH (register)` instruction.
-(define_insn "aarch64_cb"
+(define_insn "*aarch64_cb"
[(set (pc) (if_then_else (INT_CMP
(match_operand:SHORT 0 "register_operand" "r")
(match_operand:SHORT
On 04/08/2025 22:18, Richard Henderson wrote:
If we implement bare QI/HImode cbranch, movcc will
ask aarch64_gen_compare_reg for a QI/HImode compare,
which we cannot provide without modification elsewhere.
However, we can usually get the extensions for free from
surrounding operations. So e.g
If we implement bare QI/HImode cbranch, movcc will
ask aarch64_gen_compare_reg for a QI/HImode compare,
which we cannot provide without modification elsewhere.
However, we can usually get the extensions for free from
surrounding operations. So e.g. CBcond in SImode is more
generally compact than
