Re: [PATCH 3/4]AArch64: enable zero-extends using TBLs for Adv. SIMD

Tamar Christina writes: > Hi All, > > In this patch series I'm adding support for zero extending using permutes > instead of requiring multi-step decomposition. > > This codegen has the benefit of needing fewer instructions and having much > higher throughput than uxtl. We previously replaced pai

RE: [PATCH 3/4]AArch64: enable zero-extends using TBLs for Adv. SIMD

Hi Kyrill, > -Original Message- > From: Kyrylo Tkachov > Sent: Monday, October 14, 2024 12:15 PM > To: Tamar Christina > Cc: GCC Patches ; nd ; Richard > Earnshaw ; ktkac...@gcc.gnu.org; Richard > Sandiford > Subject: Re: [PATCH 3/4]AArch64: enable zero-extends

Re: [PATCH 3/4]AArch64: enable zero-extends using TBLs for Adv. SIMD

Hi Tamar, > On 14 Oct 2024, at 12:56, Tamar Christina wrote: > > External email: Use caution opening links or attachments > > > Hi All, > > In this patch series I'm adding support for zero extending using permutes > instead of requiring multi-step decomposition. > > This codegen has the bene

[PATCH 3/4]AArch64: enable zero-extends using TBLs for Adv. SIMD

Hi All, In this patch series I'm adding support for zero extending using permutes instead of requiring multi-step decomposition. This codegen has the benefit of needing fewer instructions and having much higher throughput than uxtl. We previously replaced pairs of uxtl/uxtl2s with ZIPs to increa