Re: [PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

2020-11-04 Thread Andreas Krebbel via Gcc-patches
On 04.11.20 23:12, Ilya Leoshkevich wrote: > On Wed, 2020-11-04 at 18:16 +0100, Andreas Krebbel wrote: >> On 03.11.20 22:45, Ilya Leoshkevich wrote: >>> On z14+, there are instructions for working with 128-bit floats >>> (long >>> doubles) in vector registers. It's beneficial to use them instead >

Re: [PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

2020-11-04 Thread Ilya Leoshkevich via Gcc-patches
On Wed, 2020-11-04 at 18:16 +0100, Andreas Krebbel wrote: > On 03.11.20 22:45, Ilya Leoshkevich wrote: > > On z14+, there are instructions for working with 128-bit floats > > (long > > doubles) in vector registers. It's beneficial to use them instead > > of > > instructions that operate on floatin

Re: [PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

2020-11-04 Thread Andreas Krebbel via Gcc-patches
On 03.11.20 22:45, Ilya Leoshkevich wrote: > On z14+, there are instructions for working with 128-bit floats (long > doubles) in vector registers. It's beneficial to use them instead of > instructions that operate on floating point register pairs, because it > allows to store 4 times more data in

[PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

2020-11-03 Thread Ilya Leoshkevich via Gcc-patches
On z14+, there are instructions for working with 128-bit floats (long doubles) in vector registers. It's beneficial to use them instead of instructions that operate on floating point register pairs, because it allows to store 4 times more data in registers at a time, relieveing register pressure.