Emulate MMX ssse3_phdv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/sse.md (ssse3_phdv2si3):
Changed to define_insn_and_split to support SSE emulation.
---
gcc/config/i386/sse.m
On Mon, Feb 11, 2019 at 11:55 PM H.J. Lu wrote:
>
> Emulate MMX ssse3_phdv2si3 with SSE by moving bits
> 64:95 to bits 32:63 in SSE register. Only SSE register source operand
> is allowed.
>
> PR target/89021
> * config/i386/sse.md (ssse3_phdv2si3):
> Changed to define_ins
Emulate MMX ssse3_phdv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register. Only SSE register source operand
is allowed.
PR target/89021
* config/i386/sse.md (ssse3_phdv2si3):
Changed to define_insn_and_split to support SSE emulation.
---
gcc/config/i386/sse.m