On Tue, Jun 29, 2021 at 07:06:14PM -0500, Segher Boessenkool wrote:
> On Thu, Jun 17, 2021 at 06:56:09PM -0400, Michael Meissner wrote:
> > The 'lp64' test
> > was needed because big endian 32-bit code cannot enable the IEEE 128-bit
> > floating point instructions.
>
> No, *does not* enable them.
On Thu, Jun 17, 2021 at 06:56:09PM -0400, Michael Meissner wrote:
> The 'lp64' test
> was needed because big endian 32-bit code cannot enable the IEEE 128-bit
> floating point instructions.
No, *does not* enable them. After
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
ind
Note, this patch should go into GCC 11 after baking on the master branch.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
Ping this patch:
| Date: Thu, 17 Jun 2021 18:56:09 -0400
| Subject: [PATCH 2/3 V2] Fix IEEE 128-bit min/max test.
| Message-ID: <20210617225609.ga4...@ibm-toto.the-meissners.org>
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email:
Here is a replacement patch. Can I check this into the master branch, and
eventually backport it to GCC 11?
[PATCH] Fix IEEE 128-bit min/max test.
This patch fixes the float128-minmax.c test so that it can accommodate the
generation of xsmincqp and xsmaxcqp instructions on power10. I changed
th
