Re: [PATCH 2/3]AArch64: support encoding integer immediates using floating point moves

2024-10-14 Thread Richard Sandiford
Tamar Christina writes: > Hi All, > > This patch extends our immediate SIMD generation cases to support generating > integer immediates using floating point operation if the integer immediate > maps > to an exact FP value. > > As an example: > > uint32x4_t f1() { > return vdupq_n_u32(0x3f8000

[PATCH 2/3]AArch64: support encoding integer immediates using floating point moves

2024-10-14 Thread Tamar Christina
Hi All, This patch extends our immediate SIMD generation cases to support generating integer immediates using floating point operation if the integer immediate maps to an exact FP value. As an example: uint32x4_t f1() { return vdupq_n_u32(0x3f80); } currently generates: f1: adr