lehua.ding
<mailto:lehua.d...@rivai.ai>
*Subject:* [PATCH 1/2] RISC-V: Cleanup redundant reduction patterns
after refactor vector mode
This patch cleanups redundant reduction patterns after Juzhe change
vector mode
from fixed-size to scalable-size. For example, whethe
Thanks for cleaning up.
LGTM.
juzhe.zh...@rivai.ai
From: Lehua Ding
Date: 2023-09-13 20:31
To: gcc-patches
CC: juzhe.zhong; kito.cheng; rdapp.gcc; palmer; jeffreyalaw; lehua.ding
Subject: [PATCH 1/2] RISC-V: Cleanup redundant reduction patterns after
refactor vector mode
This patch cleanups
This patch cleanups redundant reduction patterns after Juzhe change vector mode
from fixed-size to scalable-size. For example, whether it is zvl32b, zvl64b,
zvl128b, RVVM1SI indicates that it occupies a vector register. Therefore, it is
easy to map vector modes to LMUL1 vector modes with define_mod
