Re: [PATCH 1/1] aarch64: remove extra XTN in vector concatenation

2024-12-03 Thread Akram Ahmad
Hi Kyrill, thanks for the very quick response! On 02/12/2024 15:09, Kyrylo Tkachov wrote: Thanks for the patch. As this is sent after the end of stage1 and is not finishing support for an architecture feature perhaps we should stage this for GCC 16. But if it fixes a performance problem in a r

[PATCH 1/1] aarch64: remove extra XTN in vector concatenation

2024-12-02 Thread Akram Ahmad
GIMPLE code which performs a narrowing truncation on the result of a vector concatenation currently results in an unnecessary XTN being emitted following a UZP1 to concate the operands. In cases such as this, UZP1 should instead use a smaller arrangement specifier to replace the XTN instruction. Th

Re: [PATCH 1/1] aarch64: remove extra XTN in vector concatenation

2024-12-02 Thread Kyrylo Tkachov
Hi Akram, > On 2 Dec 2024, at 15:54, Akram Ahmad wrote: > > GIMPLE code which performs a narrowing truncation on the result of a > vector concatenation currently results in an unnecessary XTN being > emitted following a UZP1 to concate the operands. In cases such as this, > UZP1 should instead u