On 2/10/19, H.J. Lu wrote:
> In 64-bit mode, SSE2 can be used to emulate MMX instructions without
> 3DNOW. We can use SSE2 to support 64-bit vectors.
>
> PR target/89021
> * config/i386/i386.c (ix86_set_reg_reg_cost): Also support
> VALID_MMX_WITH_SSE_REG_MODE.
> (ix86_vec
In 64-bit mode, SSE2 can be used to emulate MMX instructions without
3DNOW. We can use SSE2 to support 64-bit vectors.
PR target/89021
* config/i386/i386.c (ix86_set_reg_reg_cost): Also support
VALID_MMX_WITH_SSE_REG_MODE.
(ix86_vector_mode_supported_p): Likewise.
On Sat, Feb 9, 2019 at 10:41 AM Uros Bizjak wrote:
>
> On 2/9/19, H.J. Lu wrote:
> >> >> Hm, this is a bit worrying, we don't want to introduce ABI
> >> >> incompatibilites w.r.t. alignment. We still need to be ABI compatible
> >> >> for MMX values and emit unaligned loads/stores when necessary.
On 2/9/19, H.J. Lu wrote:
>> >> Hm, this is a bit worrying, we don't want to introduce ABI
>> >> incompatibilites w.r.t. alignment. We still need to be ABI compatible
>> >> for MMX values and emit unaligned loads/stores when necessary.
>> >
>> > We need to audit all usages of SSE_REG_MODE_P and VA
On Sat, Feb 9, 2019 at 10:27 AM Uros Bizjak wrote:
>
> On 2/9/19, H.J. Lu wrote:
> > On Sat, Feb 9, 2019 at 7:03 AM Uros Bizjak wrote:
> >>
> >> On 2/9/19, H.J. Lu wrote:
> >> > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote:
> >> >>
> >> >> On 2/9/19, H.J. Lu wrote:
> >> >> > In 64-bit mod
On 2/9/19, H.J. Lu wrote:
> On Sat, Feb 9, 2019 at 7:03 AM Uros Bizjak wrote:
>>
>> On 2/9/19, H.J. Lu wrote:
>> > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote:
>> >>
>> >> On 2/9/19, H.J. Lu wrote:
>> >> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without
>> >> > 3DNOW.
On Sat, Feb 9, 2019 at 7:03 AM Uros Bizjak wrote:
>
> On 2/9/19, H.J. Lu wrote:
> > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote:
> >>
> >> On 2/9/19, H.J. Lu wrote:
> >> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without
> >> > 3DNOW. We can use SSE2 to support 64-bit
On 2/9/19, H.J. Lu wrote:
> On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote:
>>
>> On 2/9/19, H.J. Lu wrote:
>> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without
>> > 3DNOW. We can use SSE2 to support 64-bit vectors.
>> >
>> > PR target/89021
>> > * config/i386
On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote:
>
> On 2/9/19, H.J. Lu wrote:
> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without
> > 3DNOW. We can use SSE2 to support 64-bit vectors.
> >
> > PR target/89021
> > * config/i386/i386.h (TARGET_MMX_WITH_SSE): New.
On 2/9/19, H.J. Lu wrote:
> In 64-bit mode, SSE2 can be used to emulate MMX instructions without
> 3DNOW. We can use SSE2 to support 64-bit vectors.
>
> PR target/89021
> * config/i386/i386.h (TARGET_MMX_WITH_SSE): New.
> * config/i386/i386.h (VALID_SSE2_REG_MODE): Allow 64-bit
In 64-bit mode, SSE2 can be used to emulate MMX instructions without
3DNOW. We can use SSE2 to support 64-bit vectors.
PR target/89021
* config/i386/i386.h (TARGET_MMX_WITH_SSE): New.
* config/i386/i386.h (VALID_SSE2_REG_MODE): Allow 64-bit vector
modes for TARGET_
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