On Fri, 2020-02-28 at 18:15 -0800, H.J. Lu wrote:
> On Fri, Feb 28, 2020 at 4:16 PM Jeff Law wrote:
> > On Thu, 2020-02-27 at 06:50 -0800, H.J. Lu wrote:
> > > How about this? If it looks OK, I will post the whole patch set.
> > It's better. I'm guessing the two cases that were previously handle
On Fri, Feb 28, 2020 at 6:15 PM H.J. Lu wrote:
>
> On Fri, Feb 28, 2020 at 4:16 PM Jeff Law wrote:
> >
> > On Thu, 2020-02-27 at 06:50 -0800, H.J. Lu wrote:
> > >
> > > How about this? If it looks OK, I will post the whole patch set.
> > It's better. I'm guessing the two cases that were previou
On Fri, Feb 28, 2020 at 4:16 PM Jeff Law wrote:
>
> On Thu, 2020-02-27 at 06:50 -0800, H.J. Lu wrote:
> >
> > How about this? If it looks OK, I will post the whole patch set.
> It's better. I'm guessing the two cases that were previously handled with
> vextract/vbroadcast aren't supposed to happ
On Thu, 2020-02-27 at 06:50 -0800, H.J. Lu wrote:
>
> How about this? If it looks OK, I will post the whole patch set.
It's better. I'm guessing the two cases that were previously handled with
vextract/vbroadcast aren't supposed to happen? They're caught here IIUC:
> + /* NB: To move xmm16-xm
r convoluted. I hate the way
> > > you
> > > don't set OPCODE above and then do it down here. I would suggest breaking
> > > the !opcode bits into its own little function. Then above in those places
> > > where you do
> > >
> > > if (TAR
On Wed, 2020-02-26 at 16:02 -0800, H.J. Lu wrote:
> On Wed, Feb 26, 2020 at 2:42 PM Jeff Law wrote:
> > On Sat, 2020-02-15 at 07:26 -0800, H.J. Lu wrote:
> > > On x86, when AVX and AVX512 are enabled, vector move instructions can
> > > be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX
On Wed, Feb 26, 2020 at 2:42 PM Jeff Law wrote:
>
> On Sat, 2020-02-15 at 07:26 -0800, H.J. Lu wrote:
> > On x86, when AVX and AVX512 are enabled, vector move instructions can
> > be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512):
> >
> >0: c5 f9 6f d1 vmovdqa
On Sat, 2020-02-15 at 07:26 -0800, H.J. Lu wrote:
> On x86, when AVX and AVX512 are enabled, vector move instructions can
> be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512):
>
>0: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
>4: 62 f1 fd 08 6f d1 vmovdqa64 %xmm1,
On x86, when AVX and AVX512 are enabled, vector move instructions can
be encoded with either 2-byte/3-byte VEX (AVX) or 4-byte EVEX (AVX512):
0: c5 f9 6f d1 vmovdqa %xmm1,%xmm2
4: 62 f1 fd 08 6f d1 vmovdqa64 %xmm1,%xmm2
We prefer VEX encoding over EVEX since VEX is sho
