On Mon, Feb 4, 2019 at 12:23 PM Uros Bizjak wrote:
>
> On Mon, Feb 4, 2019 at 12:04 PM Richard Biener
> wrote:
> >
> > On Mon, Feb 4, 2019 at 10:10 AM Uros Bizjak wrote:
> > >
> > > On Fri, Feb 1, 2019 at 10:18 PM H.J. Lu wrote:
> > > >
> > > > On x86-64, since __m64 is returned and passed in X
On Mon, Feb 4, 2019 at 12:08 PM Jakub Jelinek wrote:
>
> On Mon, Feb 04, 2019 at 12:04:04PM +0100, Richard Biener wrote:
> > On Mon, Feb 4, 2019 at 10:10 AM Uros Bizjak wrote:
> > >
> > > On Fri, Feb 1, 2019 at 10:18 PM H.J. Lu wrote:
> > > >
> > > > On x86-64, since __m64 is returned and passed
On Mon, Feb 4, 2019 at 12:04 PM Richard Biener
wrote:
>
> On Mon, Feb 4, 2019 at 10:10 AM Uros Bizjak wrote:
> >
> > On Fri, Feb 1, 2019 at 10:18 PM H.J. Lu wrote:
> > >
> > > On x86-64, since __m64 is returned and passed in XMM registers, we can
> > > implement MMX intrinsics with SSE instructi
On Mon, Feb 4, 2019 at 10:10 AM Uros Bizjak wrote:
>
> On Fri, Feb 1, 2019 at 10:18 PM H.J. Lu wrote:
> >
> > On x86-64, since __m64 is returned and passed in XMM registers, we can
> > implement MMX intrinsics with SSE instructions. To support it, we disable
> > MMX by default in 64-bit mode so t
On Mon, Feb 04, 2019 at 12:04:04PM +0100, Richard Biener wrote:
> On Mon, Feb 4, 2019 at 10:10 AM Uros Bizjak wrote:
> >
> > On Fri, Feb 1, 2019 at 10:18 PM H.J. Lu wrote:
> > >
> > > On x86-64, since __m64 is returned and passed in XMM registers, we can
> > > implement MMX intrinsics with SSE in
On Fri, Feb 1, 2019 at 10:18 PM H.J. Lu wrote:
>
> On x86-64, since __m64 is returned and passed in XMM registers, we can
> implement MMX intrinsics with SSE instructions. To support it, we disable
> MMX by default in 64-bit mode so that MMX registers won't be available
> with x86-64. Most of MMX
On Fri, Feb 01, 2019 at 06:46:53PM -0800, H.J. Lu wrote:
> On Fri, Feb 1, 2019 at 4:50 PM Andi Kleen wrote:
> >
> > "H.J. Lu" writes:
> >
> > > To support it, we disable
> > > MMX by default in 64-bit mode so that MMX registers won't be available
> >
> > Wouldn't that break inline assembler that
On Sat, Feb 02, 2019 at 09:12:12AM -0800, H.J. Lu wrote:
> On Sat, Feb 2, 2019 at 9:07 AM Florian Weimer wrote:
> >
> > * H. J. Lu:
> >
> > > 1. MMX maskmovq and SSE2 maskmovdqu aren't equivalent. We emulate MMX
> > > maskmovq with SSE2 maskmovdqu by zeroing out the upper 64 bits of the
> > > mas
On Sat, Feb 2, 2019 at 9:07 AM Florian Weimer wrote:
>
> * H. J. Lu:
>
> > 1. MMX maskmovq and SSE2 maskmovdqu aren't equivalent. We emulate MMX
> > maskmovq with SSE2 maskmovdqu by zeroing out the upper 64 bits of the
> > mask operand. A warning is issued since invalid memory access may
> > hap
* H. J. Lu:
> 1. MMX maskmovq and SSE2 maskmovdqu aren't equivalent. We emulate MMX
> maskmovq with SSE2 maskmovdqu by zeroing out the upper 64 bits of the
> mask operand. A warning is issued since invalid memory access may
> happen when bits 64:127 at memory location are unmapped:
>
> xmmintrin
On Fri, Feb 1, 2019 at 4:50 PM Andi Kleen wrote:
>
> "H.J. Lu" writes:
>
> > To support it, we disable
> > MMX by default in 64-bit mode so that MMX registers won't be available
>
> Wouldn't that break inline assembler that references MMX register clobbers?
Yes. You need to use -mmmx explicitly
"H.J. Lu" writes:
> To support it, we disable
> MMX by default in 64-bit mode so that MMX registers won't be available
Wouldn't that break inline assembler that references MMX register clobbers?
-Andi
On x86-64, since __m64 is returned and passed in XMM registers, we can
implement MMX intrinsics with SSE instructions. To support it, we disable
MMX by default in 64-bit mode so that MMX registers won't be available
with x86-64. Most of MMX instructions have equivalent SSE versions and
results of
13 matches
Mail list logo
