On Mon, Apr 26, 2021 at 5:45 AM Christoph Muellner
wrote:
> This series provides a cleanup of the current atomics implementation
> of RISC-V:
>
This looks OK to me, other than the issue with address instructions emitted
inside the lr/sc loop. That could be fixed with a follow up patch though.
This series provides a cleanup of the current atomics implementation
of RISC-V:
* PR100265: Use proper fences for atomic load/store
* PR100266: Provide programmatic implementation of CAS
As both are very related, I merged the patches into one series
(to avoid merge issues if one overtake the othe
