On Fri, Oct 26, 2018 at 8:07 AM H.J. Lu wrote:
>
> Many x86 pmovzx/pmovsx instructions with memory operands are modeled in
> a wrong way. For example:
>
> (define_insn "sse4_1_v8qiv8hi2"
> [(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v")
> (any_extend:V8HI
> (vec_select:V8QI
Many x86 pmovzx/pmovsx instructions with memory operands are modeled in
a wrong way. For example:
(define_insn "sse4_1_v8qiv8hi2"
[(set (match_operand:V8HI 0 "register_operand" "=Yr,*x,v")
(any_extend:V8HI
(vec_select:V8QI
(match_operand:V16QI 1 "nonimmediate_operand" "Yrm,*xm
