chov
>> Subject: Re: [PATCH]AArch64 relax constraints on FP16 insn PR108172
>>
>> Tamar Christina writes:
>> > Hi All,
>> >
>> > The move, load, load, store, dup, basically all the non arithmetic
>> > FP16 instructions use baseline armv8-a
> -Original Message-
> From: Richard Sandiford
> Sent: Wednesday, December 21, 2022 10:31 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; Kyrylo Tkachov
> Subject: Re: [PATCH]AArch64 relax constrain
Tamar Christina writes:
> Hi All,
>
> The move, load, load, store, dup, basically all the non arithmetic FP16
> instructions use baseline armv8-a HF support, and so do not require the
> Armv8.2-a extensions. This relaxes the instructions.
>
> Bootstrapped Regtested on aarch64-none-linux-gnu and n
Hi All,
The move, load, load, store, dup, basically all the non arithmetic FP16
instructions use baseline armv8-a HF support, and so do not require the
Armv8.2-a extensions. This relaxes the instructions.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for master?
Thanks,
Ta