> -Original Message-
> From: Tamar Christina
> Sent: Tuesday, December 13, 2022 5:14 PM
> To: gcc-patches@gcc.gnu.org
> Cc: nd ; Richard Earnshaw ;
> Marcus Shawcroft ; Kyrylo Tkachov
> ; Richard Sandiford
>
> Subject: [PATCH]AArch64 Fix ILP32 tbranch
>
Hi All,
the baremetal builds are currently broken because the shift ends up in the wrong
representation if the mode is SImode and the shift amount if 31. To fix this
create the rtx constant with an explicit mode so the backend passes know which
representation it needs to take.
Bootstrapped Regt
