Re: PING: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Tue, Apr 22, 2025 at 10:01 AM Hongtao Liu wrote: > > On Mon, Apr 21, 2025 at 4:30 PM H.J. Lu wrote: > > > > On Mon, Apr 21, 2025 at 11:29 AM Hongtao Liu wrote: > > > > > > On Sat, Apr 19, 2025 at 1:25 PM H.J. Lu wrote: > > > > > > > > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > > > >

Re: PING: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Mon, Apr 21, 2025 at 4:30 PM H.J. Lu wrote: > > On Mon, Apr 21, 2025 at 11:29 AM Hongtao Liu wrote: > > > > On Sat, Apr 19, 2025 at 1:25 PM H.J. Lu wrote: > > > > > > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > > > > > > > For all different modes of all 0s/1s vectors, we can use the si

Re: PING: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Mon, Apr 21, 2025 at 11:29 AM Hongtao Liu wrote: > > On Sat, Apr 19, 2025 at 1:25 PM H.J. Lu wrote: > > > > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > > > > > For all different modes of all 0s/1s vectors, we can use the single widest > > > all 0s/1s vector register for all 0s/1s vector

Re: PING: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Sat, Apr 19, 2025 at 1:25 PM H.J. Lu wrote: > > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > > > For all different modes of all 0s/1s vectors, we can use the single widest > > all 0s/1s vector register for all 0s/1s vector uses in the whole function. > > Add a pass to generate a single wi

PING: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > For all different modes of all 0s/1s vectors, we can use the single widest > all 0s/1s vector register for all 0s/1s vector uses in the whole function. > Add a pass to generate a single widest all 0s/1s vector set instruction at > entry of the near

Re: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Mon, Dec 2, 2024, 11:16 AM Hongtao Liu wrote: > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > > > For all different modes of all 0s/1s vectors, we can use the single > widest > > all 0s/1s vector register for all 0s/1s vector uses in the whole > function. > > Add a pass to generate a sing

Re: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > For all different modes of all 0s/1s vectors, we can use the single widest > all 0s/1s vector register for all 0s/1s vector uses in the whole function. > Add a pass to generate a single widest all 0s/1s vector set instruction at > entry of the near

[PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

For all different modes of all 0s/1s vectors, we can use the single widest all 0s/1s vector register for all 0s/1s vector uses in the whole function. Add a pass to generate a single widest all 0s/1s vector set instruction at entry of the nearest common dominator for basic blocks with all 0s/1s vect