Re: [PATCH] rtl-optimization/118662 - wrong combination of vector sign-extends

2025-01-27 Thread Richard Sandiford
Richard Biener writes: > On Mon, 27 Jan 2025, Jakub Jelinek wrote: > >> On Mon, Jan 27, 2025 at 11:09:38AM +0100, Richard Biener wrote: >> >PR rtl-optimization/118662 >> >* combine.cc (try_combine): When re-materializing a load >> >from an extended reg by a lowpart subreg make sure we'

Re: [PATCH] rtl-optimization/118662 - wrong combination of vector sign-extends

2025-01-27 Thread Richard Biener
On Mon, 27 Jan 2025, Jakub Jelinek wrote: > On Mon, Jan 27, 2025 at 11:09:38AM +0100, Richard Biener wrote: > > PR rtl-optimization/118662 > > * combine.cc (try_combine): When re-materializing a load > > from an extended reg by a lowpart subreg make sure we're > > dealing with sing

Re: [PATCH] rtl-optimization/118662 - wrong combination of vector sign-extends

2025-01-27 Thread Jakub Jelinek
On Mon, Jan 27, 2025 at 11:09:38AM +0100, Richard Biener wrote: > PR rtl-optimization/118662 > * combine.cc (try_combine): When re-materializing a load > from an extended reg by a lowpart subreg make sure we're > dealing with single-component modes. > > * gcc.dg/tortu

[PATCH] rtl-optimization/118662 - wrong combination of vector sign-extends

2025-01-27 Thread Richard Biener
The following fixes an issue in the RTL combiner where we correctly combine two vector sign-exxtends with a vector load Trying 7, 9 -> 10: 7: r106:V4QI=[r119:DI] REG_DEAD r119:DI 9: r108:V4HI=sign_extend(vec_select(r106:V4QI#0,parallel)) 10: r109:V4SI=sign_extend(vec_select(r108:V