On Sun, Dec 04, 2016 at 02:36:54PM +0100, Andreas Schwab wrote:
> FAIL: gcc.target/powerpc/rldic-0.c scan-assembler-times (?n)^\\s+[a-z] 1799
> FAIL: gcc.target/powerpc/rldic-1.c scan-assembler-times (?n)^\\s+[a-z] 1799
> FAIL: gcc.target/powerpc/rldic-1.c scan-assembler-times (?n)^\\s+rldic 415
>
FAIL: gcc.target/powerpc/rldic-0.c scan-assembler-times (?n)^\\s+[a-z] 1799
FAIL: gcc.target/powerpc/rldic-1.c scan-assembler-times (?n)^\\s+[a-z] 1799
FAIL: gcc.target/powerpc/rldic-1.c scan-assembler-times (?n)^\\s+rldic 415
FAIL: gcc.target/powerpc/rldic-1.c scan-assembler-times (?n)^\\s+sldi 29
On Fri, Nov 25, 2016 at 8:51 PM, Segher Boessenkool
wrote:
> These testcases test that we generate the expected code for all of the
> rl*i* instructions, that is, rotate-and-mask and rotate-and-mask-insert
> for immediate rotation counts. All the testcases do rotate, shift left,
> as well as shif
These testcases test that we generate the expected code for all of the
rl*i* instructions, that is, rotate-and-mask and rotate-and-mask-insert
for immediate rotation counts. All the testcases do rotate, shift left,
as well as shift right; if that results in an instruction that does not
exist the t
