On 9/1/20 2:58 PM, Tom de Vries wrote:
> On 9/1/20 1:41 PM, Tobias Burnus wrote:
>> Hi Tom, hello all,
>>
>> it turned out that the testcase fails on PowerPC (but not x86_64)
>> as the nvptx lto complains: unresolved symbol
>> __sync_val_compare_and_swap_16
>>
>> The testcase uses int128 – and that
On 9/1/20 1:41 PM, Tobias Burnus wrote:
> Hi Tom, hello all,
>
> it turned out that the testcase fails on PowerPC (but not x86_64)
> as the nvptx lto complains: unresolved symbol
> __sync_val_compare_and_swap_16
>
> The testcase uses int128 – and that's the culprit, but I have no idea
> why it on
Hi Tom, hello all,
it turned out that the testcase fails on PowerPC (but not x86_64)
as the nvptx lto complains: unresolved symbol __sync_val_compare_and_swap_16
The testcase uses int128 – and that's the culprit, but I have no idea
why it only fails with PowerPC and not with x86-64.
Unless some
On 7/20/20 3:19 PM, Kwok Cheung Yeung wrote:
> On 01/07/2020 3:28 pm, Tom de Vries wrote:
>> So, I think gcc needs a copy of (some of) the
>> gcc/testsuite/gcc.dg/ia64-sync-*.c tests for effective target
>> sync_char_short.
>>
>> However, since this patch only adds partial support, we cannot enable
Hello
I posted a revised patchset about two weeks ago at:
https://gcc.gnu.org/pipermail/gcc-patches/2020-July/550291.html
Are you able to take a look at it?
Thanks
Kwok
On 01/07/2020 3:28 pm, Tom de Vries wrote:
So, I think gcc needs a copy of (some of) the
gcc/testsuite/gcc.dg/ia64-sync-*.c tests for effective target
sync_char_short.
However, since this patch only adds partial support, we cannot enable
sync_char_short for nvptx yet. So, if you stick to partia
On 01/07/2020 3:28 pm, Tom de Vries wrote:
I looked at the implementation, and it looks ok to me, though I think we
need to make explicit in a comment what the assumptions are:
- that we have read and write access to the entire word, and
Is there a situation where an 8/16-bit portion of memory
On 6/15/20 10:28 PM, Kwok Cheung Yeung wrote:
> Hello
>
> This patch adds support on nvptx for __sync_val_compare_and_swap
> operations on 1- and 2-byte values. The implementation is a straight
> copy of the version for AMD GCN.
Actually it also adds support for __sync_bool_compare_and_swap, be s
On 23/06/2020 5:51 pm, Jakub Jelinek wrote:
On Tue, Jun 23, 2020 at 06:44:26PM +0200, Thomas Schwinge wrote:
On 2020-06-15T21:28:12+0100, Kwok Cheung Yeung wrote:
This patch adds support on nvptx for __sync_val_compare_and_swap operations on
1- and 2-byte values.
Is this a thorough review th
On 6/23/20 6:44 PM, Thomas Schwinge wrote:
> Per the PTX 3.1 manual that I looked into, I see for CAS it supports:
> '.b32', '.b64'. We've got:
>
> $ build-gcc-offload-nvptx-none/gcc/xgcc
> -Bbuild-gcc-offload-nvptx-none/gcc -dM -E -x c /dev/null | grep -i
> compare.and.swap
> #define _
On 23/06/2020 5:44 pm, Thomas Schwinge wrote:
Hi!
On 2020-06-15T21:28:12+0100, Kwok Cheung Yeung wrote:
This patch adds support on nvptx for __sync_val_compare_and_swap operations on
1- and 2-byte values.
Is this a thorough review that these are the only functions missing, or
did you just im
On Tue, Jun 23, 2020 at 06:44:26PM +0200, Thomas Schwinge wrote:
> On 2020-06-15T21:28:12+0100, Kwok Cheung Yeung wrote:
> > This patch adds support on nvptx for __sync_val_compare_and_swap operations
> > on
> > 1- and 2-byte values.
>
> Is this a thorough review that these are the only function
Hi!
On 2020-06-15T21:28:12+0100, Kwok Cheung Yeung wrote:
> This patch adds support on nvptx for __sync_val_compare_and_swap operations on
> 1- and 2-byte values.
Is this a thorough review that these are the only functions missing, or
did you just implement what you found missing for some test c
Hello
This patch adds support on nvptx for __sync_val_compare_and_swap operations on
1- and 2-byte values. The implementation is a straight copy of the version for
AMD GCN.
I have added a new libgomp test that exercises the new operation. I have also
verified that the new code does not cause
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