> I fixed this with the below patch. Tested on x86_64 linux, x86_64 darwin and
> my port. If you want to
> list aarch64/arn and mips, please do.
>
> * g++.dg/init/vbase1.C: Only run on x86_64-*-* as this testcase
> isn't portable.
I have added i?86-*-* to the list.
2015-11-21 Uros Bizjak
On Nov 16, 2015, at 6:02 AM, Renlin Li wrote:
> On 14/11/15 00:33, David Edelsohn wrote:
>> No RISC architecture can store directly to MEM, so the expected RTL in
>> g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This
>> probably should be disabled for ARM and other RISC architect
Hi David,
On 14/11/15 00:33, David Edelsohn wrote:
No RISC architecture can store directly to MEM, so the expected RTL in
g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This
probably should be disabled for ARM and other RISC architectures.
I observed the same problem in arm.
On Mon, Nov 16, 2015 at 4:15 AM, Eric Botcazou wrote:
>> No RISC architecture can store directly to MEM, so the expected RTL in
>> g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This
>> probably should be disabled for ARM and other RISC architectures.
>
> Some of them can store 0
> No RISC architecture can store directly to MEM, so the expected RTL in
> g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This
> probably should be disabled for ARM and other RISC architectures.
Some of them can store 0 directly to MEM though, for example SPARC.
--
Eric Botcazou
On Sat, Nov 14, 2015 at 8:41 AM, Andreas Schwab wrote:
> David Edelsohn writes:
>
>> On Sat, Nov 14, 2015 at 5:16 AM, Andreas Schwab
>> wrote:
>>> David Edelsohn writes:
>>>
+ int c\u0024c;// { dg-error "not valid in an identifier" {
target { powerpc-ibm-aix* } } }
>>>
>>> F
David Edelsohn writes:
> On Sat, Nov 14, 2015 at 5:16 AM, Andreas Schwab wrote:
>> David Edelsohn writes:
>>
>>> + int c\u0024c;// { dg-error "not valid in an identifier" {
>>> target { powerpc-ibm-aix* } } }
>>
>> FAIL: g++.dg/cpp/ucn-1.C -std=gnu++11 target { powerpc-ibm-aix* } (t
On Sat, Nov 14, 2015 at 8:30 AM, Jakub Jelinek wrote:
> On Sat, Nov 14, 2015 at 08:09:44AM -0500, David Edelsohn wrote:
>> On Sat, Nov 14, 2015 at 5:16 AM, Andreas Schwab
>> wrote:
>> > David Edelsohn writes:
>> >
>> >> + int c\u0024c;// { dg-error "not valid in an identifier" {
>> >>
On Sat, Nov 14, 2015 at 08:09:44AM -0500, David Edelsohn wrote:
> On Sat, Nov 14, 2015 at 5:16 AM, Andreas Schwab wrote:
> > David Edelsohn writes:
> >
> >> + int c\u0024c;// { dg-error "not valid in an identifier" {
> >> target { powerpc-ibm-aix* } } }
> >
> > FAIL: g++.dg/cpp/ucn-1.C
On Sat, Nov 14, 2015 at 5:16 AM, Andreas Schwab wrote:
> David Edelsohn writes:
>
>> + int c\u0024c;// { dg-error "not valid in an identifier" {
>> target { powerpc-ibm-aix* } } }
>
> FAIL: g++.dg/cpp/ucn-1.C -std=gnu++11 target { powerpc-ibm-aix* } (test
> for errors, line 12)
Argh
David Edelsohn writes:
> + int c\u0024c;// { dg-error "not valid in an identifier" {
> target { powerpc-ibm-aix* } } }
FAIL: g++.dg/cpp/ucn-1.C -std=gnu++11 target { powerpc-ibm-aix* } (test for
errors, line 12)
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprin
On Nov 13, 2015, at 4:33 PM, David Edelsohn wrote:
> No RISC architecture can store directly to MEM, so the expected RTL in
> g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC.
So, completely non-portable test cases aren’t particularly nice. vbase1.C
fails for me as well, and it is
No RISC architecture can store directly to MEM, so the expected RTL in
g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This
probably should be disabled for ARM and other RISC architectures.
Dollar sign is not a valid identifier on AIX, so g++.dg/cpp/ucn-1.C
will produce an addition
13 matches
Mail list logo
