Re: [PATCH] aarch64: Fix endianness of DFmode vector constants

Hi Richard,   > aarch64_simd_valid_imm tries to decompose a constant into a repeating > series of 64 bits, since most Advanced SIMD and SVE immediate forms > require that.  (The exceptions are handled first.)  It does this by > building up a byte-level register image, lsb first.  If the image does

[PATCH] aarch64: Fix endianness of DFmode vector constants

aarch64_simd_valid_imm tries to decompose a constant into a repeating series of 64 bits, since most Advanced SIMD and SVE immediate forms require that. (The exceptions are handled first.) It does this by building up a byte-level register image, lsb first. If the image does turn out to repeat eve