> On 10 Dec 2024, at 7:09 PM, Richard Sandiford
> wrote:
>
> External email: Use caution opening links or attachments
>
>
> Soumya AR writes:
>> @@ -1815,6 +1849,42 @@
>> }
>> )
>>
>> +(define_insn "*aarch64_sve2_bsl2n_unpred"
>> + [(set (match_operand:VDQ_I 0 "register_operand")
>> +
Soumya AR writes:
> @@ -1815,6 +1849,42 @@
>}
> )
>
> +(define_insn "*aarch64_sve2_bsl2n_unpred"
> + [(set (match_operand:VDQ_I 0 "register_operand")
> + (ior:VDQ_I
> + (and:VDQ_I
> + (match_operand:VDQ_I 1 "register_operand")
> + (match_operand:VDQ_I 2 "register_
bsl1n_unpred): Likewise.
>> (*aarch64_sve2_bsl2n_unpred): Likewise.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/aarch64/sve/bitsel.c: New test.
>>
>> From 4be7a0ba40150322e2f67214f54c55da51ad2fd2 Mon Sep 17 00:00:00 2001
>> From:
Mon Sep 17 00:00:00 2001
> From: Soumya AR
> Date: Mon, 25 Nov 2024 11:25:44 +0530
> Subject: [PATCH] aarch64: Extend SVE2 bit-select instructions for Neon modes.
>
> NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain
> operands
> inverted. These c
> On 29 Nov 2024, at 14:16, Richard Sandiford wrote:
>
> Kyrylo Tkachov writes:
>>> On 27 Nov 2024, at 09:34, Richard Sandiford
>>> wrote:
>>>
>>> Soumya AR writes:
NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain
operands
inverted. These can be extend
Kyrylo Tkachov writes:
>> On 27 Nov 2024, at 09:34, Richard Sandiford
>> wrote:
>>
>> Soumya AR writes:
>>> NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain
>>> operands
>>> inverted. These can be extended to work with Neon modes.
>>>
>>> Since these instructions are un
> On 27 Nov 2024, at 09:34, Richard Sandiford wrote:
>
> Soumya AR writes:
>> NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain
>> operands
>> inverted. These can be extended to work with Neon modes.
>>
>> Since these instructions are unpredicated, duplicate patterns wer
Soumya AR writes:
> NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain
> operands
> inverted. These can be extended to work with Neon modes.
>
> Since these instructions are unpredicated, duplicate patterns were added with
> the predicate removed to generate these instructions
NBSL, BSL1N, and BSL2N are bit-select intructions on SVE2 with certain operands
inverted. These can be extended to work with Neon modes.
Since these instructions are unpredicated, duplicate patterns were added with
the predicate removed to generate these instructions for Neon modes.
The patch was
