Re: [PATCH] aarch64: Avoid out-of-range shrink-wrapped saves [PR111677]

Alex Coplan writes: > Hi, > > The PR shows us ICEing due to an unrecognizable TFmode save emitted by > aarch64_process_components. The problem is that for T{I,F,D}mode we > conservatively require mems to be in range for x-register ldp/stp. That > is because (at least for TImode) it can be alloca

[PATCH] aarch64: Avoid out-of-range shrink-wrapped saves [PR111677]

Hi, The PR shows us ICEing due to an unrecognizable TFmode save emitted by aarch64_process_components. The problem is that for T{I,F,D}mode we conservatively require mems to be in range for x-register ldp/stp. That is because (at least for TImode) it can be allocated to both GPRs and FPRs, and i