On Thu, Oct 21, 2021 at 12:15 AM Richard Biener
wrote:
>
> On Wed, Oct 20, 2021 at 8:34 PM H.J. Lu wrote:
> >
> > On Wed, Oct 20, 2021 at 9:58 AM Richard Biener
> > wrote:
> > >
> > > On October 20, 2021 3:19:28 PM GMT+02:00, "H.J. Lu"
> > > wrote:
> > > >On Wed, Oct 20, 2021 at 4:18 AM Richar
On Wed, Oct 20, 2021 at 8:34 PM H.J. Lu wrote:
>
> On Wed, Oct 20, 2021 at 9:58 AM Richard Biener
> wrote:
> >
> > On October 20, 2021 3:19:28 PM GMT+02:00, "H.J. Lu"
> > wrote:
> > >On Wed, Oct 20, 2021 at 4:18 AM Richard Biener
> > > wrote:
> > >>
> > >> On Wed, Oct 20, 2021 at 12:40 PM Xu Di
On Wed, Oct 20, 2021 at 9:58 AM Richard Biener
wrote:
>
> On October 20, 2021 3:19:28 PM GMT+02:00, "H.J. Lu"
> wrote:
> >On Wed, Oct 20, 2021 at 4:18 AM Richard Biener
> > wrote:
> >>
> >> On Wed, Oct 20, 2021 at 12:40 PM Xu Dianhong wrote:
> >> >
> >> > Many thanks for your explanation. I got
On October 20, 2021 3:19:28 PM GMT+02:00, "H.J. Lu" wrote:
>On Wed, Oct 20, 2021 at 4:18 AM Richard Biener
> wrote:
>>
>> On Wed, Oct 20, 2021 at 12:40 PM Xu Dianhong wrote:
>> >
>> > Many thanks for your explanation. I got the meaning of operands.
>> > The "addpd b(%rip), %xmm0" instruction need
On Wed, Oct 20, 2021 at 4:18 AM Richard Biener
wrote:
>
> On Wed, Oct 20, 2021 at 12:40 PM Xu Dianhong wrote:
> >
> > Many thanks for your explanation. I got the meaning of operands.
> > The "addpd b(%rip), %xmm0" instruction needs "b(%rip)" aligned otherwise it
> > will rise a "Real-Address Mod
On Wed, Oct 20, 2021 at 12:40 PM Xu Dianhong wrote:
>
> Many thanks for your explanation. I got the meaning of operands.
> The "addpd b(%rip), %xmm0" instruction needs "b(%rip)" aligned otherwise it
> will rise a "Real-Address Mode Exceptions".
> I haven't considered this situation "b(%rip)" has
Many thanks for your explanation. I got the meaning of operands.
The "addpd b(%rip), %xmm0" instruction needs "b(%rip)" aligned otherwise
it will rise a "Real-Address Mode Exceptions".
I haven't considered this situation "b(%rip)" has an address dependence of
"a(%rip)" before. I think this situati
On Wed, Oct 20, 2021 at 9:48 AM Xu Dianhong wrote:
>
> Thanks for the comments.
>
> > And does it even work?
> It works, I checked it in the test case, and when using this option, it can
> emit an unaligned vector move.
> >I fail to see adjustments to memory operands of
> SSE/AVX instructions tha
Thanks for the comments.
>Why would you ever want to have such option?!
I need to ask @H. J. Lu for help to answer this question. He knows more
about the background. I may not explain it clearly.
>Should the documentation
at least read "emit unaligned vector moves even for aligned storage or when
Thanks for the comments.
> And does it even work?
It works, I checked it in the test case, and when using this option, it can
emit an unaligned vector move.
>I fail to see adjustments to memory operands of
SSE/AVX instructions that have to be aligned
I changed all vector move in "get_ssemov" witho
On Wed, Oct 20, 2021 at 9:02 AM Richard Biener
wrote:
>
> On Wed, Oct 20, 2021 at 7:31 AM dianhong.xu--- via Gcc-patches
> wrote:
> >
> > From: dianhong xu
> >
> > Add -muse-unaligned-vector-move option to emit unaligned vector move
> > instaructions.
>
> Why would you ever want to have such opt
On Wed, Oct 20, 2021 at 7:31 AM dianhong.xu--- via Gcc-patches
wrote:
>
> From: dianhong xu
>
> Add -muse-unaligned-vector-move option to emit unaligned vector move
> instaructions.
Why would you ever want to have such option?! Should the documentation
at least read "emit unaligned vector moves
From: dianhong xu
Add -muse-unaligned-vector-move option to emit unaligned vector move
instaructions.
gcc/ChangeLog:
* config/i386/i386-options.c (ix86_target_string): Add
-muse-unaligned-vector-move.
* config/i386/i386.c (ix86_get_ssemov): Emit unaligned vector if use
13 matches
Mail list logo
