Re: [PATCH] RISC-V: Vector pesudoinsns with x0 operand to use imm 0. (toggle)

On 2/7/25 6:34 PM, Andrew Waterman wrote: Replacing x0 with 0 when possible is fine; it should never hurt and might help on some uarches. (Of course, future versions of those uarches will eventually be forced to improve handling of x0, anyway, since as Vineet notes, some of the interesting ca

Re: [PATCH] RISC-V: Vector pesudoinsns with x0 operand to use imm 0. (toggle)

Replacing x0 with 0 when possible is fine; it should never hurt and might help on some uarches. (Of course, future versions of those uarches will eventually be forced to improve handling of x0, anyway, since as Vineet notes, some of the interesting cases don't have immediate forms.) But I don't t

[PATCH] RISC-V: Vector pesudoinsns with x0 operand to use imm 0. (toggle)

A couple of Vector pseudoinstructions use x0 scalar which being regfile crosser could be inefficient on certain wider uarches. Use the imm 0 form, which should be functionally equivalent. pseudoinsn orig insn with x0 this patch ---