On 12/19/22 15:59, 钟居哲 wrote:
>> ISTM that if you want to run before sched2, then
you'd need to introduce dependencies between the vsetvl instrutions and
the vector instructions that utilize those settings?
Yes, I want to run before sched2 so that we could have the chance to do the
instruc
-V: Support VSETVL PASS for RVV support
On Dez 23 2022, 钟居哲 wrote:
> Would you mind telling me how you reproduce these errors ?
make bootstrap
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something co
On Dez 23 2022, 钟居哲 wrote:
> Would you mind telling me how you reproduce these errors ?
make bootstrap
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
chwab
Date: 2022-12-23 18:53
To: juzhe.zhong
CC: gcc-patches; kito.cheng; palmer
Subject: Re: [PATCH] RISC-V: Support VSETVL PASS for RVV support
How has this been tested?
In file included from ../../gcc/config/riscv/riscv-vsetvl.cc:89:
../../gcc/config/riscv/riscv-vsetvl.h: In member fun
Would you mind telling me how you reproduce these errors ?
I failed to reproduce this. Thanks
juzhe.zh...@rivai.ai
From: Andreas Schwab
Date: 2022-12-23 18:53
To: juzhe.zhong
CC: gcc-patches; kito.cheng; palmer
Subject: Re: [PATCH] RISC-V: Support VSETVL PASS for RVV support
How has this been
How has this been tested?
In file included from ../../gcc/config/riscv/riscv-vsetvl.cc:89:
../../gcc/config/riscv/riscv-vsetvl.h: In member function
'riscv_vector::avl_info riscv_vector::vl_vtype_info::get_avl_info() const':
../../gcc/config/riscv/riscv-vsetvl.h:175:43: error: implicitly-declared
nfos are important for debugging.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2022-12-19 23:44
To: juzhe.zhong; gcc-patches
CC: kito.cheng; palmer
Subject: Re: [PATCH] RISC-V: Support VSETVL PASS for RVV support
I believe Kito already approved. There's nothing here that is critical,
just min
I believe Kito already approved. There's nothing here that is critical,
just minor cleanups and I'm fine with them being cleaned up as a
follow-up patch given Kito has already approved this patch.
On 12/14/22 00:13, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
This patch is to support VSE
LGTM, and thanks for this amazing work, actually I review this more than
one month, so I gonna commit this for now.
But feel free to keep helping review that, give comment and report bug to
Ju-Zhe and me :)
於 2022年12月14日 週三 15:32 寫道：
> From: Ju-Zhe Zhong
>
> This patch is to support VSETVL P
From: Ju-Zhe Zhong
This patch is to support VSETVL PASS for RVV support.
1.The optimization and performance is guaranteed LCM (Lazy code motion).
2.Base on RTL_SSA framework to gain better optimization chances.
3.Also we do VL/VTYPE, demand information backward propagation across
blocks by RTL_
From: Ju-Zhe Zhong
This patch is to support VSETVL PASS for RVV support.
1.The optimization and performance is guaranteed LCM (Lazy code motion).
2.Base on RTL_SSA framework to gain better optimization chances.
3.Also we do VL/VTYPE, demand information backward propagation across
blocks by RTL_
From: Ju-Zhe Zhong
This patch is to support VSETVL PASS for RVV support.
1.The optimization and performance is guaranteed LCM (Lazy code motion).
2.Base on RTL_SSA framework to gain better optimization chances.
3.Also we do VL/VTYPE, demand information backward propagation across
blocks by RTL_
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