Re: [PATCH] RISC-V: Split unordered FP comparisons into individual RTL insns

2022-06-23 Thread Kito Cheng via Gcc-patches
Hi Maciej: Thanks for detail analysis and performance number report, I am concern about this patch might let compiler schedule the fsflags/frflags with other floating point instructions, and the major issue is we didn't model fflags right in GCC as you mentioned in the first email. So I think we

Re: [PATCH] RISC-V: Split unordered FP comparisons into individual RTL insns

2022-06-23 Thread Maciej W. Rozycki
On Thu, 9 Jun 2022, Maciej W. Rozycki wrote: > I'm yet running some benchmarking to see if the use of UNSPEC_VOLATILEs > makes any noticeable performance difference, but I suspect it does not as > the compiler could not do much about the original multiple-instruction > single RTL insns anyway.

[PATCH] RISC-V: Split unordered FP comparisons into individual RTL insns

2022-06-09 Thread Maciej W. Rozycki
We have unordered FP comparisons implemented as RTL insns that produce multiple machine instructions. Such RTL insns are hard to match with a processor pipeline description and additionally there is a redundant SNEZ instruction produced on the result of these comparisons even though the FLT.fm