Committed, thanks Kito and Juzhe.
Pan
From: Kito Cheng
Sent: Friday, July 28, 2023 2:46 PM
To: 钟居哲
Cc: Li Xu ; gcc-patches ;
palmer ; Li, Pan2
Subject: Re: [PATCH] RISC-V: Remove vxrm parameter for vsadd[u] and vssub[u]
I didn't checked with rvv intrinsic spec, but I assume this is
i Xu
> Date: 2023-07-28 13:52
> To: gcc-patches
> CC: kito.cheng; palmer; juzhe.zhong; pan2.li; xuli
> Subject: [PATCH] RISC-V: Remove vxrm parameter for vsadd[u] and vssub[u]
> From: xuli
>
> Computation of `vsadd`, `vsaddu`, `vssub`, and `vssubu` do not need the
> rounding mo
Thanks for fixing it.
LGTM from my side.
juzhe.zh...@rivai.ai
From: Li Xu
Date: 2023-07-28 13:52
To: gcc-patches
CC: kito.cheng; palmer; juzhe.zhong; pan2.li; xuli
Subject: [PATCH] RISC-V: Remove vxrm parameter for vsadd[u] and vssub[u]
From: xuli
Computation of `vsadd`, `vsaddu`, `vssub
From: xuli
Computation of `vsadd`, `vsaddu`, `vssub`, and `vssubu` do not need the
rounding mode, therefore the intrinsics of these instructions do not have
the parameter for rounding mode control.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
vs
