Re: [PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-14 Thread Kito Cheng via Gcc-patches
Committed :) Jeff Law via Gcc-patches 於 2023年7月14日 週五 10:52 寫道: > > > On 7/13/23 20:41, Kito Cheng via Gcc-patches wrote: > > Expanding without DONE or FAIL will leave the pattern as well, so this > > patch is fine IMO, so this patch LGTM, but anyway I will test this and > > commit if passed :)

Re: [PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-13 Thread Jeff Law via Gcc-patches
On 7/13/23 20:41, Kito Cheng via Gcc-patches wrote: Expanding without DONE or FAIL will leave the pattern as well, so this patch is fine IMO, so this patch LGTM, but anyway I will test this and commit if passed :) THanks. I looked fine to me, but I wasn't going to have the time to commit/pus

Re: [PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-13 Thread Jeff Law via Gcc-patches
On 7/13/23 20:44, Palmer Dabbelt wrote: On Thu, 13 Jul 2023 19:41:08 PDT (-0700), gcc-patches@gcc.gnu.org wrote: Expanding without DONE or FAIL will leave the pattern as well, so this patch is fine IMO, so this patch LGTM, but anyway I will test this and commit if passed :) Ah, thanks, I gu

Re: [PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-13 Thread Palmer Dabbelt
On Thu, 13 Jul 2023 19:41:08 PDT (-0700), gcc-patches@gcc.gnu.org wrote: Expanding without DONE or FAIL will leave the pattern as well, so this patch is fine IMO, so this patch LGTM, but anyway I will test this and commit if passed :) Ah, thanks, I guess I didn't know that. This is probably fi

Re: [PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-13 Thread Kito Cheng via Gcc-patches
Expanding without DONE or FAIL will leave the pattern as well, so this patch is fine IMO, so this patch LGTM, but anyway I will test this and commit if passed :) On Fri, Jul 14, 2023 at 10:34 AM Palmer Dabbelt wrote: > > On Thu, 13 Jul 2023 19:02:05 PDT (-0700), li...@eswincomputing.com wrote: >

Re: [PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-13 Thread Palmer Dabbelt
On Thu, 13 Jul 2023 19:02:05 PDT (-0700), li...@eswincomputing.com wrote: When generating the gen_and3 function based on the and3 template, it produces the expression emit_insn (gen_rtx_SET (operand0, gen_rtx_AND (, operand1, operand2)));, which is identical to the portion I removed in this patch

[PATCH] RISC-V: Remove the redundant expressions in the and3.

2023-07-13 Thread Die Li
When generating the gen_and3 function based on the and3 template, it produces the expression emit_insn (gen_rtx_SET (operand0, gen_rtx_AND (, operand1, operand2)));, which is identical to the portion I removed in this patch. Therefore, the redundant portion can be deleted. Signed-off-by: Die Li