subject:"\[PATCH\] RISC\-V\: Remove earlyclobber from widen reduction"

Re: [PATCH] RISC-V: Remove earlyclobber from widen reduction

2023-12-04 Thread Robin Dapp

LGTM. Regards Robin

[PATCH] RISC-V: Remove earlyclobber from widen reduction

2023-12-04 Thread Juzhe-Zhong

Since the destination of reduction is not a vector register group, there is no need to apply overlap constraint. Also confirm Clang: The mir in LLVM has early clobber: early-clobber %49:vrm2 = PseudoVWADD_VX_M1 $noreg(tied-def 0), killed %17:vr, %48:gpr, %0:gprnox0, 3, 0; example.c:59:24 The mi