Re: Re: [PATCH] RISC-V: Optimize a special case of VLA SLP

cc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Optimize a special case of VLA SLP LGTM (and harmless enough) but I'd rather wait for a second look or a maintainer's OK as we're past stage 1 and it's not a real bugfix. (On top, it's Thanksgiv

Re: Re: [PATCH] RISC-V: Optimize a special case of VLA SLP

/zvl256b/zvl512b/zvl1024b on both RV32 and RV64 no regression. Hope we can land it on GCC-14. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-11-23 22:58 To: Juzhe-Zhong; gcc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH] RISC-V: Optimize a special case of VLA

Re: [PATCH] RISC-V: Optimize a special case of VLA SLP

LGTM (and harmless enough) but I'd rather wait for a second look or a maintainer's OK as we're past stage 1 and it's not a real bugfix. (On top, it's Thanksgiving so not many people will even notice). On a related note, this should probably be a middle-end optimization but before a variable-index

[PATCH] RISC-V: Optimize a special case of VLA SLP

When working on fixing bugs of zvl1024b. I notice a special VLA SLP case can be better optimized. v = vec_perm (op1, op2, { nunits - 1, nunits, nunits + 1, ... }) Before this patch, we are using genriec approach (vrgather): vid vadd.vx vrgather vmsgeu vrgather With this patch, we use vec_extrac