@gmail.com
Subject: Re: [PATCH] RISC-V: Optimize VSETVL codegen of SELECT_VL with
LEN_MASK_{LOAD,STORE}
On 6/25/23 06:20, Juzhe-Zhong wrote:
> This patch is depending on LEN_MASK_{LOAD,STORE} patch:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622742.html
>
> After enabling t
On 6/25/23 06:20, Juzhe-Zhong wrote:
This patch is depending on LEN_MASK_{LOAD,STORE} patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622742.html
After enabling the LEN_MASK_{LOAD,STORE}, I notice that there is a case that
VSETVL PASS need to be optimized:
void
f (int32_t *__rest
This patch is depending on LEN_MASK_{LOAD,STORE} patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622742.html
After enabling the LEN_MASK_{LOAD,STORE}, I notice that there is a case that
VSETVL PASS need to be optimized:
void
f (int32_t *__restrict a,
int32_t *__restrict b,
int32
