On 5/25/23 18:52, Die Li wrote:
This patch allows less instructions to be used when TARGET_XTHEADCONDMOV is
enabled.
Provide an example from the existing testcases.
Testcase:
int ConEmv_imm_imm_reg(int x, int y){
if (x == 1000) return 10;
return y;
}
Cflags:
-O2 -march=rv64gc_xtheadc
LGTM. Happy to move this forward, once it receives an OK from one of you.
--Philipp.
On Fri, 26 May 2023 at 02:53, Die Li wrote:
>
> This patch allows less instructions to be used when TARGET_XTHEADCONDMOV is
> enabled.
>
> Provide an example from the existing testcases.
>
> Testcase:
> int Co
On 5/25/23 20:43, Kito Cheng wrote:
I would defer this to vrull or t-head folks :)
Given the overlap between where this is going and how I think we should
be handling Zicondops, I'll take it. It overlaps with work I've had
Raphael doing recently.
jeff
I would defer this to vrull or t-head folks :)
Die Li 於 2023年5月26日 週五 08:53 寫道：
> This patch allows less instructions to be used when TARGET_XTHEADCONDMOV
> is enabled.
>
> Provide an example from the existing testcases.
>
> Testcase:
> int ConEmv_imm_imm_reg(int x, int y){
> if (x == 1000) re
This patch allows less instructions to be used when TARGET_XTHEADCONDMOV is
enabled.
Provide an example from the existing testcases.
Testcase:
int ConEmv_imm_imm_reg(int x, int y){
if (x == 1000) return 10;
return y;
}
Cflags:
-O2 -march=rv64gc_xtheadcondmov -mabi=lp64d
before patch:
ConEm
