Re: [PATCH] RISC-V: Move RVV V_REGS liveness computation into analyze_loop_vinfo

LGTM :) On Mon, Dec 25, 2023 at 5:18 PM Juzhe-Zhong wrote: > > Currently, we compute RVV V_REGS liveness during better_main_loop_than_p > which is not appropriate > time to do that since we for example, when have the codes will finally pick > LMUL = 8 vectorization > factor, we compute liveness

[PATCH] RISC-V: Move RVV V_REGS liveness computation into analyze_loop_vinfo

Currently, we compute RVV V_REGS liveness during better_main_loop_than_p which is not appropriate time to do that since we for example, when have the codes will finally pick LMUL = 8 vectorization factor, we compute liveness for LMUL = 8 multiple times which are redundant. Since we have leverage