LGTM
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2025-02-24 19:14
To: gcc-patches
CC: pal...@dabbelt.com; kito.ch...@gmail.com; juzhe.zh...@rivai.ai;
jeffreya...@gmail.com; pan2...@intel.com; rdapp@gmail.com
Subject: [PATCH] RISC-V: Include pattern stmts for dynamic LMUL computation
Hi,
when scanning for program points, i.e. vector statements, we're missing
pattern statements. In PR114516 this becomes obvious as we choose
LMUL=8 assuming there are only three statements but the divmod pattern
adds another three. Those push us beyond four registers so we need to
switch to LMU
