Re: [PATCH] RISC-V: Fix the sge ..., x0, ... pattern

LGTM, that's apparently some kind of copy & paste error (from *slt pattern) when we add this pattern. On Sun, Aug 7, 2022 at 3:42 AM Palmer Dabbelt wrote: > > There's no operand 2 here, so referencing it doesn't make sense. I > couldn't find a way to trigger bad assembly output so I don't have a

[PATCH] RISC-V: Fix the sge ..., x0, ... pattern

There's no operand 2 here, so referencing it doesn't make sense. I couldn't find a way to trigger bad assembly output so I don't have a test. gcc/ChangeLog PR target/106543 * config/riscv/riscv.md (sge_): Remove reference to non-existent operand. --- No new failures on th