Re: [PATCH] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]

vsetvl in fixed-vlmax vectorized codes[PR112326] With compile option --param=riscv-autovec-preference=fixed-vlmax, we have redundant AVL/VL toggling: vsetvli a5,a3,e8,mf4,ta,ma -> should be changed into e32m1 vle32.v v1,0(a1) vle32.v v2,0(a0) vsetivli zero,4,e32,m1,ta,ma -> redundant slli a

[PATCH] RISC-V: Fix redundant vsetvl in fixed-vlmax vectorized codes[PR112326]

With compile option --param=riscv-autovec-preference=fixed-vlmax, we have redundant AVL/VL toggling: vsetvli a5,a3,e8,mf4,ta,ma -> should be changed into e32m1 vle32.v v1,0(a1) vle32.v v2,0(a0) vsetivlizero,4,e32,m1,ta,ma -> redundant sllia2,a5,2