subject:"\[PATCH\] RISC\-V\: Fix bugs of supporting AVL=REG \(single\-real\-def\) in VSETVL PASS"

Re: [PATCH] RISC-V: Fix bugs of supporting AVL=REG (single-real-def) in VSETVL PASS

2023-01-26 Thread Kito Cheng via Gcc-patches

committed, thanks. On Tue, Jan 10, 2023 at 7:29 AM wrote: > From: Ju-Zhe Zhong > > gcc/ChangeLog: > > * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it. > (real_insn_and_same_bb_p): New function. > (same_bb_and_after_or_equal_p): Remove it. > (befo

[PATCH] RISC-V: Fix bugs of supporting AVL=REG (single-real-def) in VSETVL PASS

2023-01-09 Thread juzhe . zhong

From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it. (real_insn_and_same_bb_p): New function. (same_bb_and_after_or_equal_p): Remove it. (before_p): New function. (reg_killed_by_bb_p): Ditto. (has_vset