y as LLVM which is also adding earlyclobber for modeling
> disabling overlap between dest and source operand.
>
>
>
> juzhe.zh...@rivai.ai
>
> From: Jeff Law
> Date: 2023-04-22 04:36
> To: juzhe.zhong; gcc-patches
> CC: kito.cheng
> Subject: Re: [PATCH] RISC-V: Fine
.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-04-22 04:36
To: juzhe.zhong; gcc-patches
CC: kito.cheng
Subject: Re: [PATCH] RISC-V: Fine tune gather load RA constraint
On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> For DEST EEW < SOURCE EEW, we can par
On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
For DEST EEW < SOURCE EEW, we can partial overlap register
according to RVV ISA.
gcc/ChangeLog:
* config/riscv/vector.md: Fix RA constraint.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/narrow_cons
Re: [PATCH] RISC-V: Fine tune gather load RA constraint
On 3/15/23 00:52, juzhe.zh...@rivai.ai wrote:
> Hi, Jeff. I really hope the current "refine tune RA constraint" patches
> can be merged into GCC-13.
> These patches are just making RA constraint to be consistent with RVV
On 3/15/23 00:52, juzhe.zh...@rivai.ai wrote:
Hi, Jeff. I really hope the current "refine tune RA constraint" patches
can be merged into GCC-13.
These patches are just making RA constraint to be consistent with RVV
ISA after I double checked RVV ISA.
These RA constraints changing is very safe
to make it into GCC-13.
More patches I am gonna to send are going to expected to be merged into GCC-14.
Thanks.
juzhe.zh...@rivai.ai
From: Jeff Law
Date: 2023-03-15 02:08
To: juzhe.zhong; gcc-patches
CC: kito.cheng
Subject: Re: [PATCH] RISC-V: Fine tune gather load RA constraint
On 3/1
On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
For DEST EEW < SOURCE EEW, we can partial overlap register
according to RVV ISA.
gcc/ChangeLog:
* config/riscv/vector.md: Fix RA constraint.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/narrow_cons
From: Ju-Zhe Zhong
For DEST EEW < SOURCE EEW, we can partial overlap register
according to RVV ISA.
gcc/ChangeLog:
* config/riscv/vector.md: Fix RA constraint.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/narrow_constraint-12.c: New test.
---
gcc/config/riscv/vector.