Committed, thanks Jeff and Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of ???
Sent: Wednesday, August 30, 2023 6:27 AM
To: Jeff Law ; kito.cheng
Cc: gcc-patches ; kito.cheng
Subject: Re: Re: [PATCH] RISC-V: Enable movmisalign for VLS modes
> OK for the trunk.
Tha
Law
Date: 2023-08-29 22:23
To: Kito Cheng; Juzhe-Zhong
CC: gcc-patches; kito.cheng
Subject: Re: [PATCH] RISC-V: Enable movmisalign for VLS modes
On 8/29/23 07:54, Kito Cheng via Gcc-patches wrote:
>> +/* To support misalign data movement, we should use
>> + minimum
On 8/29/23 07:54, Kito Cheng via Gcc-patches wrote:
+/* To support misalign data movement, we should use
+ minimum element alignment load/store. */
+unsigned int size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+poly_int64 nunits = GET_MODE_NUNITS (mode) * size;
+machine_mo
> +/* To support misalign data movement, we should use
> + minimum element alignment load/store. */
> +unsigned int size = GET_MODE_SIZE (GET_MODE_INNER (mode));
> +poly_int64 nunits = GET_MODE_NUNITS (mode) * size;
> +machine_mode mode = riscv_vector::get_vector_mode (QImode
Prevous patch (which removed VLA modes movmisalign pattern) to fix run-time bug.
Such patch disable vectorization for misalign data movement.
After I check LLVM codes, LLVM supports misalign for VLS modes.
Before this patch:
sll a5,a4,0x1
add a5,a5,a1
lhu a3,64(a5)
lbu a5,66(a5)
