Re: [PATCH] RISC-V: Do not use vsetivli for THeadVector.

On 7/8/25 6:21 AM, Robin Dapp wrote: Hi, in emit_vlmax_insn_lra we use a vsetivli for an immediate AVL. XTHeadVector does not support this, so guard appropriately. Regtested on rv64gcv_zvl512b. Regards Robin PR target/120461 gcc/ChangeLog: * config/riscv/riscv-v.cc (emit_vlmax_

[PATCH] RISC-V: Do not use vsetivli for THeadVector.

Hi, in emit_vlmax_insn_lra we use a vsetivli for an immediate AVL. XTHeadVector does not support this, so guard appropriately. Regtested on rv64gcv_zvl512b. Regards Robin PR target/120461 gcc/ChangeLog: * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Do not emit vset