Re: Re: [PATCH] RISC-V: Do not allow v0 as dest when merging [PR115068].

v0,v8,a5,v0.t > vd and vm are both v0 which is wrong. li a0,0 ret juzhe.zh...@rivai.ai From: Robin Dapp Date: 2024-05-16 03:31 To: 钟居哲; gcc-patches CC: rdapp.gcc; palmer; kito.cheng; Jeff Law Subject: Re: [PATCH] RISC-V: Do not allow v0 as dest when merging [PR115068]. >

Re: [PATCH] RISC-V: Do not allow v0 as dest when merging [PR115068].

> I saw vwadd/vwsub.wx have same issue. Could you change them and add test too ? Yes, will do. At first I didn't manage to reproduce it because we seem to be lacking a combine-opt pattern for it. I'm going to post it separately. Regards Robin

Re: [PATCH] RISC-V: Do not allow v0 as dest when merging [PR115068].

Hi, Robin. I saw vwadd/vwsub.wx have same issue. Could you change them and add test too ? Thanks. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2024-05-14 04:15 To: gcc-patches CC: rdapp.gcc; palmer; Kito Cheng; juzhe.zh...@rivai.ai; jeffreyalaw Subject: [PATCH] RISC-V: Do not allow v0 as

[PATCH] RISC-V: Do not allow v0 as dest when merging [PR115068].

Hi, this patch splits the vfw...wf pattern so we do not emit e.g. vfwadd.wf v0,v8,fa5,v0.t anymore. Regtested on rv64gcv_zvfh. Regards Robin gcc/ChangeLog: PR target/115068 * config/riscv/vector.md: Split vfw.wf pattern. gcc/testsuite/ChangeLog: * gcc.target/riscv/