...@arm.com
Subject: RE: [PATCH] RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion
Update the PATCH v2 here,
https://gcc.gnu.org/pipermail/gcc-patches/2023-April/615937.html.
Running the boostrap/regression test, and keep you posted.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Li
Biener
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com;
rguent...@suse.de; Wang, Yanzhang ;
richard.sandif...@arm.com
Subject: RE: [PATCH] RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion
I look into the IOR simplification code for this optimization. Mostly I try to
...@sifive.com;
rguent...@suse.de; Wang, Yanzhang ;
richard.sandif...@arm.com
Subject: Re: [PATCH] RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion
On Tue, Apr 18, 2023 at 9:59 AM Richard Biener
wrote:
>
> On Tue, Apr 18, 2023 at 3:31 AM Li, Pan2 via Gcc-patches
> wrote:
> >
>
;
richard.sandif...@arm.com
Subject: Re: [PATCH] RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion
On Tue, Apr 18, 2023 at 3:31 AM Li, Pan2 via Gcc-patches
wrote:
>
> Passed the X86 bootstrap and regression tests.
>
> Pan
>
> -Original Message-
> From: Li, Pan2
> Sent: M
2
> > Sent: Monday, April 17, 2023 10:50 PM
> > To: gcc-patches@gcc.gnu.org
> > Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; rguent...@suse.de; Li,
> > Pan2 ; Wang, Yanzhang ;
> > richard.sandif...@arm.com
> > Subject: [PATCH] RISC-V: Allow Vector IOR(V1, NO
ivai.ai; kito.ch...@sifive.com; rguent...@suse.de; Li, Pan2
> ; Wang, Yanzhang ;
> richard.sandif...@arm.com
> Subject: [PATCH] RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion
>
> From: Pan Li
>
> This patch add the optimization for the vector IOR(V1, NOT V1).
: [PATCH] RISC-V: Allow Vector IOR(V1, NOT V1) optimiztion
From: Pan Li
This patch add the optimization for the vector IOR(V1, NOT V1). Assume we have
below sample code.
vbool32_t test_shortcut_for_riscv_vmorn_case_5(vbool32_t v1, size_t vl) {
return __riscv_vmorn_mm_b32(v1, v1, vl); }
Before
From: Pan Li
This patch add the optimization for the vector IOR(V1, NOT V1). Assume
we have below sample code.
vbool32_t test_shortcut_for_riscv_vmorn_case_5(vbool32_t v1, size_t vl)
{
return __riscv_vmorn_mm_b32(v1, v1, vl);
}
Before this patch:
vsetvli a5,zero,e8,mf4,ta,ma
vlm.vv24,0(a
