On 6/12/23 09:15, 钟居哲 wrote:
Change
+(define_insn "@pred_extract_first_sextdi"
into
(define_insn "*pred_extract_first_sextdi"
Change
+(define_insn "@pred_extract_first_sextsi"
into
(define_insn "*pred_extract_first_sextsi"
I don't think we will call combine pattern in vector-opt.md in th
> Change
>
> +(define_insn "@pred_extract_first_sextdi"
>
> into
>
> (define_insn "*pred_extract_first_sextdi"
Yeah, I was thinking about this as well right after sending.
We will probably never call this directly.
Regards
Robin
ctor-opt.md in the future.
Use "*" instead of "@" can save resources during building.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-12 23:04
To: gcc-patches; palmer; Kito Cheng; juzhe.zh...@rivai.ai; jeffreyalaw
CC: rdapp.gcc
Subject: [PATCH] RISC-V: Add sign-extending varia
Hi,
when the destination register of a vmv.x.s needs to be sign extended to
XLEN we currently emit an sext insn. Since vmv.x.s performs this
implicitly this patch adds two instruction patterns (intended for
combine et al.) that include sign_extend for the destination operand.
The tests extend th
