Re: [PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply

On 8/20/25 12:53 PM, Paul-Antoine Arras wrote: This pattern enables the combine pass (or late-combine, depending on the case) to merge a vec_duplicate into a mult RTL instruction. Before this patch, we have two instructions, e.g.: vfmv.v.f v2,fa0 vfmul.vv v1,v1,v2 After, we

[PATCH] RISC-V: Add pattern for vector-scalar single-width floating-point multiply

This pattern enables the combine pass (or late-combine, depending on the case) to merge a vec_duplicate into a mult RTL instruction. Before this patch, we have two instructions, e.g.: vfmv.v.f v2,fa0 vfmul.vv v1,v1,v2 After, we get only one: vfmul.vf v2,v2,fa0 gcc/ChangeL