zhong
CC: gcc-patches; kito.cheng
Subject: Re: [PATCH] RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
On Okt 17 2022, juzhe.zh...@rivai.ai wrote:
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/vsetvl-1.c: New test.
This fails if the ilp32d ABI is not available.
On Okt 17 2022, juzhe.zh...@rivai.ai wrote:
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/vsetvl-1.c: New test.
This fails if the ilp32d ABI is not available.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"An
Verified, committed to trunk.
On Mon, Oct 17, 2022 at 4:37 PM wrote:
>
> From: Ju-Zhe Zhong
>
> gcc/ChangeLog:
>
> * config.gcc: Add riscv-vector-builtins-bases.o and
> riscv-vector-builtins-shapes.o
> * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New macro.
>
From: Ju-Zhe Zhong
gcc/ChangeLog:
* config.gcc: Add riscv-vector-builtins-bases.o and
riscv-vector-builtins-shapes.o
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New macro.
(DEF_RVV_FUNCTION): Ditto.
(handle_pragma_vector): Add intrinsic framework.
